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HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator

    Buy cheap HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator from wholesalers
     
    Buy cheap HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator from wholesalers
    • Buy cheap HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator from wholesalers

    HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator

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    HEF4538BP integrated circuit components Integrated Circuit Chip Dual precision monostable multivibrator


    Dual precision monostable multivibrator HEF4538B MSI


    DESCRIPTION

    The HEF4538B is a dual retriggerable-resettable monostable multivibrator. Each multivibrator has an active LOW trigger/retrigger input (I0), an active HIGH trigger/retrigger input (I1), an overriding active LOW direct reset input (CD), an output (O) and its complement (O), and two pins (CTC, (1) RCTC) for connecting the external timing components Ct and Rt. Typical pulse width variation over temperature range is ± 0,2%.

    The HEF4538B may be triggered by either the positive or the negative edges of the input pulse and will produce an accurate output pulse with a pulse width range of 10 µs to infinity. The duration and accuracy of the output pulse are determined by the external timing components Ct and Rt. The output pulse width (T) is equal to Rt × Ct. The linear design techniques in LOCMOS guarantee precise control of the output pulse width.

    A LOW level at CD terminates the output pulse immediately. Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times.


    HEF4538BP(N): 16-lead DIL; plastic (SOT38-1)

    HEF4538BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)

    HEF4538BT(D): 16-lead SO; plastic (SOT109-1)

    ( ): Package Designator North America


    Fig.1 Functional diagram.


    Fig.2 Pinning diagram.


    PINNING

    I0A, I0B input (HIGH to LOW triggered)

    I1A, I1B input (LOW to HIGH triggered)

    CDA, CDB direct reset input (active LOW)

    OA, OB output

    OA, OB complementary output (active LOW)

    CTC A, CTC B external capacitor connections(1)

    RCTC A, RCTC B external capacitor/ resistor connections

    Note 1. Always connected to ground.


    Fig.3 Logic diagram.


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