LP38691DT-5.0 Electronic Integrated Circuit IC Chips Low Dropout CMOS Linear Regulators

LP38691/LP38693

500mA Low Dropout CMOS Linear Regulators

Stable with Ceramic Output Capacitors

General Description

The LP38691/3 low dropout CMOS linear regulators provide tight output tolerance (2.0% typical), extremely low dropout voltage (250 mV @ 500mA load current, V_OUT = 5V), and excellent AC performance utilizing ultra low ESR ceramic output capacitors.

The low thermal resistance of the LLP, SOT-223 and T0-252 packages allow the full operating current to be used even in high ambient temperature environments.

The use of a PMOS power transistor means that no DC base drive current is required to bias it allowing ground pin current to remain below 100 µA regardless of load current, input voltage, or operating temperature.

Dropout Voltage: 250 mV (typ) @ 500mA (typ. 5V out).

Ground Pin Current: 55 µA (typ) at full load.

Precision Output Voltage: 2.0% (25˚C) accuracy.

Features

• 2.0% output accuracy (25˚C)

• Low dropout voltage: 250 mV @ 500mA (typ, 5V out)

• Wide input voltage range (2.7V to 10V)

• Precision (trimmed) bandgap reference

• Guaranteed specs for -40˚C to +125˚C

• 1µA off-state quiescent current

• Thermal overload protection

• Foldback current limiting

• T0-252, SOT-223 and 6-Lead LLP packages

• Enable pin (LP38693)

Applications

• Hard Disk Drives

• Notebook Computers

• Battery Powered Devices

• Portable Instrumentation

Typical Application Circuits

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Storage Temperature Range −65˚C to +150˚C

Lead Temp. (Soldering, 5 seconds) 260˚C

ESD Rating (Note 3) 2 kV

Power Dissipation (Note 2) Internally Limited

V(max) All pins (with respect to GND) -0.3V to 12V

I_OUT Internally Limited

Junction Temperature −40˚C to +150˚C

Operating Ratings

V_IN Supply Voltage 2.7V to 10V

Operating Junction Temperature Range −40˚C to +125˚C

Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions.

Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). The junction-to-ambient thermal resistance ( θJ-A) for the TO-252 is approximately 90˚C/W for a PC board mounting with the device soldered down to minimum copper area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator for the TO-252, the θJ-A drops to approximately 50˚C/W. The SOT-223 package has a θJ-A of approximately 125˚C/W when soldered down to a minimum sized pattern (less than 0.1 square inch) and approximately 70˚C/W when soldered to a copper area of one square inch. The θJ-A values for the LLP package are also dependent on trace area, copper thickness, and the number of thermal vias used (refer to application note AN-1187). If power disspation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown.

Note 3: ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin.

Connection Diagrams

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