19mm Length Broadcom Chip

Features

■ PEX 8612 Vitals
- 12-lane, 3-port PCIe Gen2 switch
- Integrated 5.0 GT/s SerDes
- 19 x 19mm 2 , 324-pin FCBGA package
- Typical Power: 1.6 Watts

■ PEX 8612 Key Features
- Standards Compliant
- PCI Express Base Specification, r2.0 (backwards compatible w/ PCIe r1.0a/1.1)
- PCI Express Base Specification, r2.0 (backwards compatible w/ PCIe r1.0a/1.1)
- PCI Power Management Spec, r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes speed control

The PEX 8612’s 3 ports can be configured to lane widths of x1, x2, or x4. Flexible buffer allocation, along with the device's flexible packet flow
control, maximizes throughput for applications where more traffic flows in the downstream, rather than upstream, direction. Any port can be designated
as the upstream port, which can be changed dynamically. The PEX 8612 also provides several ways to configure its registers. The device can be
configured through strapping pins, I 2 C interface, host software, or an optional serial EEPROM. This allows for easy debug during the development
phase, performance monitoring during the operation phase, and driver or software upgrade. Figure 1 shows some of the PEX 8612’s common port
configurations.