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... serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high...
...), a clock input (CP), an asynchronous active HIGH parallel load input (PL), eight asynchronous parallel data inputs (P0 to P7) and buffered parallel outputs from the last three stages (05 to O7). Each regis...
...’HC393 devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices comprise two independent 4-bit binary counters, each having a clear...
... 38 Inputs; 210A Inputs have built-in pull-up resistors Peripheral Component Interconnect (PCI) compliant 32 Outputs 64 Flip-flops; 2 clock choices 4 “PAL22V16” blocks...
... Barrier Diode ►Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package ►3-State Bus-Driving Outputs ►Full Parallel Access for Loading ►Buffered Control Inputs ►Clock-Enable Input Has Hysteres...
... outputs and converts them to MOS logic levels. The device may be driven from standard 54/74 series and 54S/74S series gates and flip-flops or from drivers such...